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SUNNYVALE, Calif., Oct. 8 /PRNewswire/ -- The X Initiative, a semiconductor supply-chain consortium, today announced the results of a successful effort by charter member Numerical Technologies, Inc. (Nasdaq: NMTC) to process the first X Architecture photomask data with optical proximity correction (OPC), based on design data provided by charter member Simplex Solutions, Inc. (Nasdaq: SPLX). Numerical used its CATS(TM) mask data preparation (MDP) tool -- which is used in virtually every photomask manufacturing facility worldwide to prepare design information for mask manufacturing -- to assess MDP for X Architecture designs, both with and without the addition of OPC. Numerical's CATS was able to efficiently process the X Architecture geometries, demonstrating comparable results with traditional designs in terms of both processing time and data volume.

Numerical's results, which confirm that today's industry-standard MDP tool is well suited for processing X Architecture designs for mask production, bears out the expectation that X Architecture designs will not fundamentally change key fabrication steps. This experiment will help accelerate the adoption of the X Architecture as a production-worthy approach to the pervasive use of diagonal interconnect, which drives a host of benefits, including improved chip performance, power consumption and number of working chips per wafer.

``Based on these results, we are confident that the X Architecture can be processed for mask making through Numerical's data preparation and OPC solutions,'' said Atul Sharan, Numerical's senior vice president of marketing and business development. ``With our comprehensive design-to-silicon solution portfolio, Numerical is in a unique position to enable and optimize the link from design-to-manufacturing as new technologies such as the X Architecture are adopted.''

In a separate announcement today*, the X Initiative announced the successful production of the world's first X Architecture mask by DuPont Photomasks, Inc. DuPont Photomasks was able to produce this first-of-its-kind photomask leveraging today's mask manufacturing software and equipment, including CATS, for current-generation 0.18-micron process technologies. Using 0.18-micron design data in GDSII format, supplied by Simplex, DuPont Photomasks determined that all test results fall within the range of normal compared to ``Manhattan'' designs using only right-angle interconnects.

Commenting on the significance of these efforts, Aki Fujimura, president and chief operating officer of Simplex Solutions, said, ``Numerical's experiments have helped to confirm both that X Architecture masks are manufacturable and that the supply chain is in place to deliver cost-effective X Architecture masks to IC manufacturers.''

Facilitating collaborative work to accelerate the readiness of the supply chain is the fundamental mission of the X Initiative. Anyone interested in learning more about the X Initiative or the mask results above is invited to attend the X Initiative Open Forum on October 11 at the Westin Hotel in Santa Clara, Calif., beginning at 12 noon. Speakers will include DuPont's Ken Rygler; Paul DePesa, director of strategic marketing for Numerical; and Simplex's Aki Fujimura. Those interested may RSVP or learn about other Open Forum dates and locations at www.xinitiative.org.

About the X Architecture

The X Architecture, the first production-worthy approach to the pervasive use of diagonal interconnect, reduces the total interconnect, or wiring, on a chip by more than 20 percent. Based on initial evaluations, this wire-length reduction is expected to deliver simultaneous improvements of 10+ percent greater chip performance, 20+ percent less power dissipation, and 30+ percent more chips per wafer for complex, multiple-metal-layer ICs such as systems-on-chip (SoCs). For the past 20 years, chip design has been primarily based on the defacto industry standard ``Manhattan'' architecture, named for its right-angle interconnects resembling a city-street grid. The X Architecture rotates the primary direction of the interconnect in the fourth and fifth metal layers by 45 degrees from a Manhattan architecture. The new architecture maintains compatibility with existing cell libraries, memory cells, compilers and IP cores by preserving the Manhattan geometry of metal layers one through three.

About the X Initiative

The X Initiative, a group of leading companies from throughout the semiconductor industry, is chartered with accelerating the availability and fabrication of the X Architecture, a revolutionary interconnect architecture based on the pervasive use of diagonal routing. The X Initiative's five-year mission is to provide an independent source of education about the X Architecture, to facilitate support and fabrication of the X Architecture through the semiconductor industry supply chain, and to survey usage of the X Architecture to track its adoption. Representing leaders spanning the entire design-to-silicon infrastructure, X Initiative members include: Artisan Components, Inc. (www.artisan.com); Dai Nippon Printing (www.dnp.co.jp); DuPont Photomasks, Inc. (www.photomask.com); Etec Systems, Inc., an Applied Materials, Inc. company (www.etec.com); KLA-Tencor Corporation (www.kla-tencor.com); Matsushita Electric Industrial Co., Ltd. (www.matsushita.co.jp); Numerical Technologies, Inc. (www.numeritech.com); PDF Solutions, Inc. (www.pdf.com); Silicon Perspective Corp. (www.siperspective.com); Simplex Solutions, Inc. (www.simplex.com); STMicroelectronics (www.st.com); Tensilica, Inc. (www.tensilica.com); Toshiba Machine Co., Ltd. (www.toshiba-machine.com); Toshiba Corporation (www.toshiba.com); and Virtual Silicon Technology, Inc. (www.virtual-silicon.com). Membership is open to all companies throughout the semiconductor supply chain; materials can be found at www.xinitiative.org.

Cautionary Note Regarding Forward-looking Statements

This release contains forward-looking statements (including, without limitation, information regarding semiconductor design, production and performance improvements resulting from the X Architecture, the compatibility of the X Architecture with current technology, the future success of X Architecture technology and the ability of certain of the X Initiative members to support the X Architecture) that involve risks and uncertainties that could cause the results of X Initiative members and other events to differ materially from managements' current expectations.

Actual results and events may differ materially due to a number of factors, including, among others: future strategic decisions made by the X Initiative members; failure of the X Architecture to enable the production of designs that are feasible and competitive with current designs or future alternatives; future strategic decisions made by X Initiative members or others that inhibit the development of the X Architecture; demand for advanced semiconductors that are developed using the X Architecture; cost feasibility of the production of semiconductors designed using the X Architecture; and the rapid pace of technological change in the semiconductor industry. The matters discussed in this press release also involve risks and uncertainties described in the most recent filings of the X Initiative members with the Securities and Exchange Commission. The X Initiative members assume no obligation to update the forward-looking information contained in this release.